2020-07-06 15:51:01 +02:00
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// The Construct
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//
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// Copyright (C) The Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2020 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_SIMD_SHIFT_H
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2020-08-07 08:34:37 +02:00
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// xmmx shifter interface
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2020-07-06 15:51:01 +02:00
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namespace ircd::simd
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{
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template<int b,
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class T>
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typename std::enable_if<sizeof(T) == 16, T>::type
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shl(const T a) noexcept;
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template<int b,
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class T>
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typename std::enable_if<sizeof(T) == 32, T>::type
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shl(const T a) noexcept;
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2020-08-07 08:34:37 +02:00
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template<int b,
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class T>
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typename std::enable_if<sizeof(T) == 64, T>::type
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shl(const T a) noexcept;
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2020-07-06 15:51:01 +02:00
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template<int b,
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class T>
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typename std::enable_if<sizeof(T) == 16, T>::type
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shr(const T a) noexcept;
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template<int b,
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class T>
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typename std::enable_if<sizeof(T) == 32, T>::type
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shr(const T a) noexcept;
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2020-08-07 08:34:37 +02:00
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template<int b,
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class T>
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typename std::enable_if<sizeof(T) == 64, T>::type
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shr(const T a) noexcept;
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}
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// xmmx shifter fallback template (internal)
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namespace ircd::simd
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{
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template<int b,
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class V,
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class T>
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T _shl(const T) noexcept;
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template<int b,
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class V,
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class T>
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T _shr(const T) noexcept;
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2020-07-06 15:51:01 +02:00
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}
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#ifdef HAVE_X86INTRIN_H
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 16, T>::type
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ircd::simd::shr(const T a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
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);
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2020-07-09 02:26:48 +02:00
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return T(_mm_bsrli_si128(u128x1(a), b / 8));
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2020-07-06 15:51:01 +02:00
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}
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#endif
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#ifdef HAVE_X86INTRIN_H
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 16, T>::type
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ircd::simd::shl(const T a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "xmmx register only shifts left at bytewise resolution."
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);
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2020-07-09 02:26:48 +02:00
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return T(_mm_bslli_si128(u128x1(a), b / 8));
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2020-07-06 15:51:01 +02:00
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}
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#endif
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#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 32, T>::type
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ircd::simd::shr(const T a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "ymmx register only shifts right at bytewise resolution."
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);
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2020-07-09 02:26:48 +02:00
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return T(_mm256_srli_si256(u256x1(a), b / 8));
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2020-07-06 15:51:01 +02:00
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}
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2020-08-07 08:34:37 +02:00
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#else
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 32, T>::type
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ircd::simd::shr(const T a)
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noexcept
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{
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return _shr<b, u8x32>(a);
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}
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2020-07-06 15:51:01 +02:00
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#endif
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#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 32, T>::type
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ircd::simd::shl(const T a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "ymmx register only shifts left at bytewise resolution."
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);
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2020-07-09 02:26:48 +02:00
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return T(_mm256_slli_si256(u256x1(a), b / 8));
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2020-07-06 15:51:01 +02:00
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}
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2020-08-07 08:34:37 +02:00
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#else
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 32, T>::type
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ircd::simd::shl(const T a)
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noexcept
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{
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return _shl<b, u8x32>(a);
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}
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#endif
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#if defined(HAVE_X86INTRIN_H) && defined(__AVX512F__)
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 64, T>::type
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ircd::simd::shr(const T a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "ymmx register only shifts right at bytewise resolution."
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);
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return T(_mm512_srli_si512(u512x1(a), b / 8));
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}
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#else
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 64, T>::type
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ircd::simd::shr(const T a)
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noexcept
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{
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return _shr<b, u8x64>(a);
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}
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2020-07-06 15:51:01 +02:00
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#endif
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2020-08-07 08:34:37 +02:00
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#if defined(HAVE_X86INTRIN_H) && defined(__AVX512F__)
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 64, T>::type
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ircd::simd::shl(const T a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "ymmx register only shifts left at bytewise resolution."
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);
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return T(_mm512_slli_si512(u512x1(a), b / 8));
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}
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#else
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template<int b,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline typename std::enable_if<sizeof(T) == 64, T>::type
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ircd::simd::shl(const T a)
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noexcept
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{
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return _shl<b, u8x64>(a);
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}
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#endif
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template<int b,
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class V,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline T
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ircd::simd::_shr(const T a)
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noexcept
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{
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static_assert
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(
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sizeof(T) == sizeof(V)
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);
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static_assert
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(
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b % 8 == 0, "[emulated] xmmx register only shifts right at bytewise resolution."
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);
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constexpr int B
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{
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b / 8
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};
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V ret;
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for(size_t i(0); i < sizeof(V) - B; ++i)
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ret[i] = a[i + B];
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for(size_t i(sizeof(V) - B); i < sizeof(V); ++i)
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ret[i] = 0;
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return T(ret);
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}
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template<int b,
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class V,
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class T>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline T
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ircd::simd::_shl(const T a)
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noexcept
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{
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static_assert
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(
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sizeof(T) == sizeof(V)
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);
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static_assert
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(
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b % 8 == 0, "[emulated] xmmx register only shifts left at bytewise resolution."
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);
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constexpr int B
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{
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b / 8
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};
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V ret;
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for(size_t i(0); i < B; ++i)
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ret[i] = 0;
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for(size_t i(B); i < sizeof(V); ++i)
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ret[i] = a[i - B];
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return T(ret);
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}
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