2020-03-12 19:44:14 +01:00
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// The Construct
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//
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// Copyright (C) The Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2020 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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//
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// This header is not included with the standard include group (ircd.h).
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// Include this header in specific units as necessary.
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//
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#pragma once
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2020-03-14 19:33:36 +01:00
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#define HAVE_IRCD_SIMD_H
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2020-03-12 19:44:14 +01:00
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#include <RB_INC_X86INTRIN_H
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2020-03-14 19:33:36 +01:00
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#ifdef HAVE_X86INTRIN_H
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#define IRCD_SIMD
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#endif
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2020-03-12 19:44:14 +01:00
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//
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// scalar
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//
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namespace ircd
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{
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typedef int8_t i8;
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typedef int16_t i16;
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typedef int32_t i32;
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typedef int64_t i64;
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typedef int128_t i128;
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typedef uint8_t u8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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typedef uint64_t u64;
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typedef uint128_t u128;
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typedef float f32;
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typedef double f64;
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typedef long double f128;
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}
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//
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// unsigned
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//
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2020-03-14 19:33:36 +01:00
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#if defined(IRCD_SIMD)
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namespace ircd
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{
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typedef __v64qu u8x64; // [
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typedef __v32qu u8x32; // [0|1|2|3|4|5|6|7|8|9|a|b|c|d|e|f|0|1|2|3|4|5|6|7|8|9|a|b|c|d|e|f|
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typedef __v16qu u8x16; // [0|1|2|3|4|5|6|7|8|9|a|b|c|d|e|f|
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typedef __v32hu u16x32; // [
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typedef __v16hu u16x16; // [_0_|_1_|_2_|_3_|_4_|_5_|_6_|_7_|_8_|_9_|_a_|_b_|_c_|_d_|_e_|_f_|
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typedef __v8hu u16x8; // [_0_|_1_|_2_|_3_|_4_|_5_|_6_|_7_|
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typedef __v16su u32x16; // [
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typedef __v8su u32x8; // [__0__|__1__|__2__|__3__|__4__|__5__|__6__|__7__|
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typedef __v4su u32x4; // [__0__|__1__|__2__|__3__|
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typedef __v8du u64x8; // [
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typedef __v4du u64x4; // [____0____|____1____|____2____|____3____|
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typedef __v2du u64x2; // [____0____|____1____|
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typedef __m128i u128x1; // [________0________|
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typedef __m128i_u u128x1_u; // unaligned
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typedef __m256i u256x1; // [________________0________________|
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typedef __m256i_u u256x1_u; // unaligned
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typedef __m512i u512x1; // [_______________________________0________________________________|
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typedef __m512i_u u512x1_u; // unaligned
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}
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#endif
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//
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// signed
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//
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2020-03-14 19:33:36 +01:00
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#if defined(IRCD_SIMD)
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namespace ircd
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{
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typedef __v64qi i8x64; // [
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typedef __v32qi i8x32; // [0|1|2|3|4|5|6|7|8|9|a|b|c|d|e|f|0|1|2|3|4|5|6|7|8|9|a|b|c|d|e|f|
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typedef __v16qi i8x16; // [0|1|2|3|4|5|6|7|8|9|a|b|c|d|e|f|
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typedef __v32hi i16x32; // [
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typedef __v16hi i16x16; // [_0_|_1_|_2_|_3_|_4_|_5_|_6_|_7_|_8_|_9_|_a_|_b_|_c_|_d_|_e_|_f_|
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typedef __v8hi i16x8; // [_0_|_1_|_2_|_3_|_4_|_5_|_6_|_7_|
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typedef __v16si i32x16; // [
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typedef __v8si i32x8; // [__0__|__1__|__2__|__3__|__4__|__5__|__6__|__7__|
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typedef __v4si i32x4; // [__0__|__1__|__2__|__3__|
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typedef __v8di i64x8; // [
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typedef __v4di i64x4; // [____0____|____1____|____2____|____3____|
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typedef __v2di i64x2; // [____0____|____1____|
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typedef __m128i i128x1; // [________0________]
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typedef __m128i_u i128x1_u; // unaligned
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typedef __m256i i256x1; // [________________0________________|
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typedef __m256i_u i256x1_u; // unaligned
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typedef __m512i i512x1; // [_______________________________0________________________________|
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typedef __m512i_u i512x1_u; // unaligned
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}
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#endif
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//
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// single precision
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//
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2020-03-14 19:33:36 +01:00
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#if defined(IRCD_SIMD)
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namespace ircd
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{
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typedef __v16qs f8x16; // [0|1|2|3|4|5|6|7|8|9|a|b|c|d|e|f|
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typedef __v16sf f32x16; // [
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typedef __v8sf f32x8; // [__0__|__1__|__2__|__3__|__4__|__5__|__6__|__7__|
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typedef __v4sf f32x4; // [__0__|__1__|__2__|__3__|
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typedef __m128 f128x1; // [____|____0____|____|
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typedef __m128_u f128x1_u; // unaligned
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typedef __m256 f256x1; // [________________0________________|
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typedef __m256_u f256x1_u; // unaligned
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typedef __m512 f512x1; // [_______________________________0________________________________|
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typedef __m512_u f512x1_u; // unaligned
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}
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#endif
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//
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// double precision
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//
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2020-03-14 19:33:36 +01:00
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#if defined(IRCD_SIMD)
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namespace ircd
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{
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typedef __v8df f64x8; // [
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typedef __v4df f64x4; // [____0____|____1____|____2____|____3____|
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typedef __v2df f64x2; // [____0____|____1____|
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typedef __m128d d128x1; // [________0________]
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typedef __m128d_u d128x1_u; // unaligned
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typedef __m256d d256x1; // [________________0________________|
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typedef __m256d_u d256x1_u; // unaligned
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typedef __m512d d512x1; // [_______________________________0________________________________|
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typedef __m512d_u d512x1_u; // unaligned
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}
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#endif
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//
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2020-06-25 00:58:02 +02:00
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// tools
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2020-03-12 19:44:14 +01:00
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//
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2020-06-25 00:58:02 +02:00
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namespace ircd::simd
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{
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// other words
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struct pshuf_imm8;
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// lane number convenience constants
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extern const u8x32 u8x32_lane_id;
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extern const u16x16 u16x16_lane_id;
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extern const u8x16 u8x16_lane_id;
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extern const u32x8 u32x8_lane_id;
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extern const u16x8 u16x8_lane_id;
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extern const u64x4 u64x4_lane_id;
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extern const u32x4 u32x4_lane_id;
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extern const u64x2 u64x2_lane_id;
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extern const u256x1 u256x1_lane_id;
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extern const u128x1 u128x1_lane_id;
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// xmmx shifter workarounds
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template<int bits, class T> T shl(const T &a) noexcept;
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template<int bits, class T> T shr(const T &a) noexcept;
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template<int bits> u128x1 shl(const u128x1 &a) noexcept;
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template<int bits> u128x1 shr(const u128x1 &a) noexcept;
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// debug print lanes hex
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template<class V>
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string_view print_lane(const mutable_buffer &buf, const V &) noexcept;
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// debug print register hex
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template<class V>
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string_view print_reg(const mutable_buffer &buf, const V &) noexcept;
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// debug print memory hex
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template<class V>
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string_view print_mem(const mutable_buffer &buf, const V &) noexcept;
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}
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namespace ircd
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{
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using simd::shl;
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using simd::shr;
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}
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/// Shuffle control structure. This represents an 8-bit immediate operand;
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/// note it can only be used if constexprs are allowed in your definition unit.
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struct ircd::simd::pshuf_imm8
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{
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u8 dst3 : 2; // set src idx for word 3
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u8 dst2 : 2; // set src idx for word 2
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u8 dst1 : 2; // set src idx for word 1
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u8 dst0 : 2; // set src idx for word 0
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};
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2020-06-24 19:28:03 +02:00
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2020-06-25 00:58:02 +02:00
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template<int b>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline ircd::u128x1
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ircd::simd::shr(const u128x1 &a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
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);
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return _mm_bsrli_si128(a, b / 8);
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}
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2020-06-25 00:16:47 +02:00
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2020-06-25 00:58:02 +02:00
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template<int b>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline ircd::u128x1
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ircd::simd::shl(const u128x1 &a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
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);
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return _mm_bslli_si128(a, b / 8);
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}
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