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ircd::simd: Split and improve byte shifter interface.

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This commit is contained in:
Jason Volk 2020-07-06 06:51:01 -07:00
parent a021b496cd
commit 6195be54a5
2 changed files with 106 additions and 73 deletions
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104
include/ircd/simd/shift.h Normal file
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@ -0,0 +1,104 @@
// The Construct
//
// Copyright (C) The Construct Developers, Authors & Contributors
// Copyright (C) 2016-2020 Jason Volk <jason@zemos.net>
//
// Permission to use, copy, modify, and/or distribute this software for any
// purpose with or without fee is hereby granted, provided that the above
// copyright notice and this permission notice is present in all copies. The
// full license for this software is available in the LICENSE file.
#pragma once
#define HAVE_IRCD_SIMD_SHIFT_H
// xmmx shifter workarounds
namespace ircd::simd
{
template<int b,
class T>
typename std::enable_if<sizeof(T) == 16, T>::type
shl(const T a) noexcept;
template<int b,
class T>
typename std::enable_if<sizeof(T) == 32, T>::type
shl(const T a) noexcept;
template<int b,
class T>
typename std::enable_if<sizeof(T) == 16, T>::type
shr(const T a) noexcept;
template<int b,
class T>
typename std::enable_if<sizeof(T) == 32, T>::type
shr(const T a) noexcept;
}
#ifdef HAVE_X86INTRIN_H
template<int b,
class T>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline typename std::enable_if<sizeof(T) == 16, T>::type
ircd::simd::shr(const T a)
noexcept
{
static_assert
(
b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
);
return _mm_bsrli_si128(a, b / 8);
}
#endif
#ifdef HAVE_X86INTRIN_H
template<int b,
class T>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline typename std::enable_if<sizeof(T) == 16, T>::type
ircd::simd::shl(const T a)
noexcept
{
static_assert
(
b % 8 == 0, "xmmx register only shifts left at bytewise resolution."
);
return _mm_bslli_si128(a, b / 8);
}
#endif
#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
template<int b,
class T>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline typename std::enable_if<sizeof(T) == 32, T>::type
ircd::simd::shr(const T a)
noexcept
{
static_assert
(
b % 8 == 0, "ymmx register only shifts right at bytewise resolution."
);
return _mm256_srli_si256(a, b / 8);
}
#endif
#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
template<int b,
class T>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline typename std::enable_if<sizeof(T) == 32, T>::type
ircd::simd::shl(const T a)
noexcept
{
static_assert
(
b % 8 == 0, "ymmx register only shifts left at bytewise resolution."
);
return _mm256_slli_si256(a, b / 8);
}
#endif

75
include/ircd/simd/simd.h
View file

@ -14,6 +14,7 @@
#include "type.h"
#include "traits.h"
#include "lane_cast.h"
#include "shift.h"
#include "print.h"
namespace ircd::simd
@ -24,87 +25,15 @@ namespace ircd::simd
template<class T> uint popcount(const T) noexcept;
template<class T> uint clz(const T) noexcept;
template<class T> uint ctz(const T) noexcept;
// xmmx shifter workarounds
template<int bits, class T> T shl(const T &a) noexcept;
template<int bits, class T> T shr(const T &a) noexcept;
template<int bits> u128x1 shl(const u128x1 &a) noexcept;
template<int bits> u128x1 shr(const u128x1 &a) noexcept;
template<int bits> u256x1 shl(const u256x1 &a) noexcept;
template<int bits> u256x1 shr(const u256x1 &a) noexcept;
}
namespace ircd
{
using simd::lane_cast;
using simd::shl;
using simd::shr;
using simd::lane_cast;
}
#ifdef HAVE_X86INTRIN_H
template<int b>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline ircd::u128x1
ircd::simd::shr(const u128x1 &a)
noexcept
{
static_assert
(
b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
);
return _mm_bsrli_si128(a, b / 8);
}
#endif
#ifdef HAVE_X86INTRIN_H
template<int b>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline ircd::u128x1
ircd::simd::shl(const u128x1 &a)
noexcept
{
static_assert
(
b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
);
return _mm_bslli_si128(a, b / 8);
}
#endif
#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
template<int b>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline ircd::u256x1
ircd::simd::shr(const u256x1 &a)
noexcept
{
static_assert
(
b % 8 == 0, "ymmx register only shifts right at bytewise resolution."
);
return _mm256_srli_si256(a, b / 8);
}
#endif
#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
template<int b>
[[using gnu: always_inline, gnu_inline, artificial]]
extern inline ircd::u256x1
ircd::simd::shl(const u256x1 &a)
noexcept
{
static_assert
(
b % 8 == 0, "ymmx register only shifts right at bytewise resolution."
);
return _mm256_slli_si256(a, b / 8);
}
#endif
/// Convenience template. Unfortunately this drops to scalar until specific
/// targets and specializations are created.
template<class T>