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https://github.com/matrix-construct/construct
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ircd::gpt: Task header reorganization/resimplification.
This commit is contained in:
Jason Volk
parent
c1f3e580c3
commit
b72a4590b1
120
include/ircd/gpt/ctrl.h
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120
include/ircd/gpt/ctrl.h
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// Matrix Construct
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//
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// Copyright (C) Matrix Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2021 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_GPT_CTRL_H
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/// Epoch Precision Interrupt Controller
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///
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struct ircd_gpt_ctrl_epic
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{
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/// Accumulates the number of task cycles. The cycle counter is incremented
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/// by device software after each repetition of the kernel pipeline to
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/// produce one additional token.
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ulong cycle;
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/// Accumulates the epoch count for the task. The counter is incremented
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/// by one in device software before control returns back to the host.
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/// Several cycles may occur during each epoch.
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ulong epoch;
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/// Accumulates the training epoch count for the task. The counter is
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/// incremented by one in device software for each backward propagation.
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ulong step;
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/// Updated by the host with the value of the timestamp register as sampled
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/// immediately before each transfer of control to the device.
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ulong host_tsc;
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/// Accumulates time in microseconds elapsed for the task.
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ulong elapsed;
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};
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/// Token Context Buffer (Control Block)
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///
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struct ircd_gpt_ctrl_tokens
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{
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/// Token ring head. Tokens in the ring extend behind the head for
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/// `tokens`. The `head` value is automatically modulated by device
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/// software to wrap around the ring.
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uint head;
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/// Token counter. The counter indicates the number of valid tokens in
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/// the context buffer. This value must not exceed the buffer size.
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uint count;
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/// Accumulates the number of tokens produced by the task. Several tokens
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/// may be produced each epoch, but currently only one token is produced
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/// each cycle.
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ulong produced;
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/// Accumulates the number tokens witnessed by the task. The number of
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/// tokens in the context for each cycle is counted as witnessed.
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ulong witnessed;
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};
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/// Task Control Page
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///
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/// The control block is shared with our device software. Execution state is
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/// maintained in the task control block across cycles. The control block is
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/// the mutable state component for an execution; for the immutable component
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/// also shared with device software see opts.h.
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///
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struct ircd_gpt_ctrl
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{
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/// Epoch counting & interrupt control block.
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struct ircd_gpt_ctrl_epic epic;
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/// Token context control block. Contains state for the token context
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/// buffer; the buffer with the tokens themselves is elsewhere.
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struct ircd_gpt_ctrl_tokens tokens;
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/// Logit softmax state
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struct ircd_math_samax samax;
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/// Target label loss state
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struct ircd_math_mean loss;
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/// Target label perplexity score state
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struct ircd_math_mean perp;
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/// Target label certainty difference state
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struct ircd_math_mean cert;
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/// PRNG xoshiro256 state. This is the de facto random seed which can be
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/// set before cycle entry by the host. It is updated by device software
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/// when used.
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ulong rand[4];
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/// Perform backprop
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bool prop;
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/// Header magic 0xC7012C70
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uint magic;
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/// The token buffer starts at offset 2048 and continues to the end of
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/// the page; options specify the size of the tokens buffer in tokens.
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/// Additional pages must be attached for larger buffer sizes.
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ushort token[] __attribute__((aligned(2048)));
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}
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__attribute__((aligned(4096)));
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#ifdef __cplusplus
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namespace ircd::gpt
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{
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using ctrl = struct ircd_gpt_ctrl;
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}
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#endif
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#ifdef __cplusplus
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static_assert(sizeof(struct ircd_gpt_ctrl) == 4096);
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static_assert(offsetof(struct ircd_gpt_ctrl, token) == 2048);
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static_assert(std::is_standard_layout<struct ircd_gpt_ctrl>::value);
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#endif
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@ -27,6 +27,9 @@ namespace ircd::gpt
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#include "vocab.h"
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#include "model.h"
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#include "token.h"
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#include "task/task.h"
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#include "gate.h"
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#include "opts.h"
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#include "ctrl.h"
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#include "task.h"
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#include "pipe/pipe.h"
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#include "generate.h"
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@ -11,12 +11,6 @@
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#pragma once
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#define HAVE_IRCD_GPT_TASK_H
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#include "epic.h"
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#include "tokens.h"
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#include "gate.h"
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#include "opts.h"
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#include "ctrl.h"
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#ifdef __cplusplus
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/// Task Context
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///
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@ -1,65 +0,0 @@
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// Matrix Construct
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//
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// Copyright (C) Matrix Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2021 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_GPT_TASK_CTRL_H
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/// Task Control Page
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///
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/// The control block is shared with our device software. Execution state is
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/// maintained in the task control block across cycles. The control block is
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/// the mutable state component for an execution; for the immutable component
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/// also shared with device software see opts.h.
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///
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struct ircd_gpt_ctrl
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{
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/// Epoch counting & interrupt control block.
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struct ircd_gpt_task_epic epic;
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/// Token context control block. Contains state for the token context
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/// buffer; the buffer with the tokens themselves is elsewhere.
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struct ircd_gpt_task_tokens tokens;
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/// Logit softmax state
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struct ircd_math_samax samax;
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/// Target label loss state
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struct ircd_math_mean loss;
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/// Target label perplexity score state
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struct ircd_math_mean perp;
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/// Target label certainty difference state
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struct ircd_math_mean cert;
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/// PRNG xoshiro256 state. This is the de facto random seed which can be
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/// set before cycle entry by the host. It is updated by device software
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/// when used.
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ulong rand[4];
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/// Perform backprop
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bool prop;
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/// Header magic 0xC7012C70
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uint magic;
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/// The token buffer starts at offset 2048 and continues to the end of
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/// the page; options specify the size of the tokens buffer in tokens.
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/// Additional pages must be attached for larger buffer sizes.
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ushort token[] __attribute__((aligned(2048)));
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}
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__attribute__((aligned(4096)));
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#ifdef __cplusplus
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namespace ircd::gpt
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{
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using ctrl = struct ircd_gpt_ctrl;
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}
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#endif
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@ -1,38 +0,0 @@
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// Matrix Construct
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//
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// Copyright (C) Matrix Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2021 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_GPT_TASK_EPIC_H
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/// Epoch Precision Interrupt Controller
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///
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struct ircd_gpt_task_epic
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{
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/// Accumulates the number of task cycles. The cycle counter is incremented
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/// by device software after each repetition of the kernel pipeline to
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/// produce one additional token.
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ulong cycle;
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/// Accumulates the epoch count for the task. The counter is incremented
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/// by one in device software before control returns back to the host.
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/// Several cycles may occur during each epoch.
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ulong epoch;
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/// Accumulates the training epoch count for the task. The counter is
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/// incremented by one in device software for each backward propagation.
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ulong step;
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/// Updated by the host with the value of the timestamp register as sampled
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/// immediately before each transfer of control to the device.
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ulong host_tsc;
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/// Accumulates time in microseconds elapsed for the task.
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ulong elapsed;
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};
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@ -1,35 +0,0 @@
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// Matrix Construct
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//
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// Copyright (C) Matrix Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2021 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_GPT_TASK_TOKENS_H
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/// Token Context Buffer (Control Block)
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///
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struct ircd_gpt_task_tokens
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{
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/// Token ring head. Tokens in the ring extend behind the head for
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/// `tokens`. The `head` value is automatically modulated by device
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/// software to wrap around the ring.
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uint head;
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/// Token counter. The counter indicates the number of valid tokens in
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/// the context buffer. This value must not exceed the buffer size.
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uint count;
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/// Accumulates the number of tokens produced by the task. Several tokens
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/// may be produced each epoch, but currently only one token is produced
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/// each cycle.
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ulong produced;
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/// Accumulates the number tokens witnessed by the task. The number of
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/// tokens in the context for each cycle is counted as witnessed.
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ulong witnessed;
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};
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