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ircd::ctx: Add slice total counter; move check_stack after timing sample.

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This commit is contained in:
Jason Volk 2018-05-05 22:31:52 -07:00
parent 2167311b2e
commit f55304e0a1
3 changed files with 29 additions and 4 deletions
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1
include/ircd/ctx/prof.h
View file

@ -38,6 +38,7 @@ namespace ircd::ctx::prof
enum class event;
struct settings extern settings;
const ulong &total_slice_cycles();
const ulong &cur_slice_start();
ulong cur_slice_cycles();

10
ircd/ctx.cc
View file

@ -909,6 +909,7 @@ ircd::ctx::debug_stats(const pool &pool)
namespace ircd::ctx::prof
{
ulong _slice_start; // Time slice state
ulong _slice_total; // Monotonic accumulator
void check_stack();
void check_slice();
@ -963,6 +964,12 @@ ircd::ctx::prof::cur_slice_start()
return _slice_start;
}
const ulong &
ircd::ctx::prof::total_slice_cycles()
{
return _slice_total;
}
void
ircd::ctx::prof::handle_cur_enter()
{
@ -978,8 +985,8 @@ ircd::ctx::prof::handle_cur_leave()
void
ircd::ctx::prof::handle_cur_yield()
{
check_stack();
check_slice();
check_stack();
}
void
@ -1004,6 +1011,7 @@ ircd::ctx::prof::check_slice()
auto &c(cur());
c.cycles += last_cycles;
_slice_total += last_cycles;
if(unlikely(settings.slice_warning > 0 && last_cycles >= settings.slice_warning))
log::dwarning

22
modules/console.cc
View file

@ -766,9 +766,25 @@ console_cmd__ctx__list(opt &out, const string_view &line)
<< (interruption(ctx)? 'I' : '-')
;
out << " " << std::setw(7) << std::right << stack_max(ctx) << " SS";
out << " " << std::setw(15) << std::right << cycles(ctx) << " TSC";
out << " :" << name(ctx);
const auto pct
{
cycles(ctx) / (long double)ctx::prof::total_slice_cycles()
};
out << " "
<< std::setw(5) << std::right << std::fixed << std::setprecision(2) << (pct * 100)
<< "%";
out << " "
<< std::setw(15) << std::right << cycles(ctx)
<< " TSC";
out << " "
<< std::setw(7) << std::right << stack_max(ctx)
<< " SS";
out << " :"
<< name(ctx);
out << std::endl;
}