mirror of
https://github.com/matrix-construct/construct
synced 2024-11-27 01:02:46 +01:00
150 lines
4.4 KiB
C++
150 lines
4.4 KiB
C++
// The Construct
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//
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// Copyright (C) The Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2020 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_BUFFER_STREAM_H
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namespace ircd::buffer
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{
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size_t stream_aligned(const mutable_buffer &dst, const const_buffer &src);
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}
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/// Non-temporal copy. This copies from an aligned source to an aligned
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/// destination without the data cycling through the d-cache. The alignment
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/// requirements are currently very strict. The source and destination buffers
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/// must begin at a cache-line alignment and the size of the buffers must be
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/// a multiple of something we'll call "register-file size" which is the size
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/// of all named multimedia registers (256 for SSE, 512 for AVX, 2048 for
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/// AVX512) so it's safe to say buffers should just be aligned and padded out
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/// to 4K page-size to be safe. The size of the src argument itself can be an
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/// arbitrary size and this function will return that size, but its backing
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/// buffer must be padded out to alignment.
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///
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inline size_t
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ircd::buffer::stream_aligned(const mutable_buffer &dst,
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const const_buffer &src)
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{
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// Platforms that have non-temporal store support; this is all of x86_64
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constexpr bool has_store
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{
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#if defined(__SSE2__) && !defined(RB_GENERIC)
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true
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#else
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false
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#endif
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};
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// Platforms that have non-temporal load support; sidenote SSE4.1 can do
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// 16 byte loads and AVX2 can do 32 byte loads; SSE2 cannot do loads.
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constexpr bool has_load
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{
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#if defined(__AVX__) && !defined(RB_GENERIC)
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true
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#else
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false
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#endif
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};
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// Use the AVX512 vector type unconditionally as it conveniently matches
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// the cache-line size on the relevant platforms and simplifies our syntax
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// below by being a single object. On those w/o AVX512 it uses an
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// isomorphic configuration of the best available regs.
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using block_type = u512x1;
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// The number of cache lines we'll have "in flight" which is basically
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// just a gimmick to unroll the loop such that each iteration covers
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// the full register file. On SSE with 256 bytes of register file we can
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// name 4 cache lines at once; on AVX with 512 bytes we can name 8, etc.
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constexpr size_t file_lines
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{
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#if defined(__AVX512F__)
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32
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#elif defined(__AVX__)
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8
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#else
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4
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#endif
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};
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// Configurable magic number only relevant to SSE2 systems which don't have
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// non-temporal load instructions. On these platforms we'll conduct a
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// prefetch loop and mark the lines NTA.
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constexpr size_t latency
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{
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16
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};
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// When the constexpr conditions aren't favorable we can fallback to
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// normal copy here.
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if constexpr(!has_store && !has_load)
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return copy(dst, src);
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// Assert valid arguments
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assert(!overlap(src, dst));
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assert(aligned(data(src), sizeof(block_type)));
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assert(aligned(data(dst), sizeof(block_type)));
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assert(size(dst) % (sizeof(block_type) * file_lines));
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// Size in bytes to be copied
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const size_t copy_size
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{
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std::min(size(src), size(dst))
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};
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// Number of lines to be copied.
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const size_t copy_lines
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{
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(copy_size / sizeof(block_type)) + bool(copy_size % sizeof(block_type))
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};
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// destination base ptr
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block_type *const __restrict__ out
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{
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reinterpret_cast<block_type *__restrict__>(data(dst))
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};
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// source base ptr
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const block_type *const __restrict__ in
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{
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reinterpret_cast<const block_type *__restrict__>(data(src))
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};
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if constexpr(!has_load)
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#pragma clang loop unroll(disable)
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for(size_t i(0); i < latency; ++i)
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__builtin_prefetch(in + i, 0, 0);
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for(size_t i(0); i < copy_lines; i += file_lines)
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{
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if constexpr(!has_load)
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for(size_t j(0); j < file_lines; ++j)
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__builtin_prefetch(in + i + latency + j, 0, 0);
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block_type block[file_lines];
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for(size_t j(0); j < file_lines; ++j)
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#if defined(__clang__)
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block[j] = __builtin_nontemporal_load(in + i + j);
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#else
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block[j] = *(in + i + j); //TODO: XXX
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#endif
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for(size_t j(0); j < file_lines; ++j)
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#if defined(__clang__)
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__builtin_nontemporal_store(block[j], out + i + j);
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#else
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*(out + i + j) = block[j]; //TODO: XXX
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#endif
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}
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if constexpr(has_store)
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asm volatile ("sfence");
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return copy_size;
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}
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