mirror of
https://github.com/matrix-construct/construct
synced 2024-09-06 16:55:22 +02:00
128 lines
3 KiB
C++
128 lines
3 KiB
C++
// The Construct
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//
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// Copyright (C) The Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2020 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_SIMD_H
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#include "type.h"
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#include "traits.h"
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#include "lane_cast.h"
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#include "print.h"
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namespace ircd::simd
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{
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template<class T> T popmask(const T) noexcept;
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template<class T> size_t popcount(const T) noexcept;
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// xmmx shifter workarounds
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template<int bits, class T> T shl(const T &a) noexcept;
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template<int bits, class T> T shr(const T &a) noexcept;
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template<int bits> u128x1 shl(const u128x1 &a) noexcept;
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template<int bits> u128x1 shr(const u128x1 &a) noexcept;
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template<int bits> u256x1 shl(const u256x1 &a) noexcept;
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template<int bits> u256x1 shr(const u256x1 &a) noexcept;
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}
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namespace ircd
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{
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using simd::shl;
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using simd::shr;
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using simd::lane_cast;
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}
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/// Convenience template. Vector compare instructions yield 0xff on equal;
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/// sometimes one might need an actual value of 1 for accumulators or maybe
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/// some bool-type reason...
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template<class T>
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inline size_t
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ircd::simd::popcount(const T a)
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noexcept
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{
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size_t i(0), ret(0);
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while(i < lanes(a))
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ret += __builtin_popcountll(a[i++]);
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return ret;
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}
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/// Convenience template. Vector compare instructions yield 0xff on equal;
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/// sometimes one might need an actual value of 1 for accumulators or maybe
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/// some bool-type reason...
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template<class T>
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inline T
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ircd::simd::popmask(const T a)
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noexcept
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{
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return a & 1;
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}
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#ifdef HAVE_X86INTRIN_H
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template<int b>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline ircd::u128x1
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ircd::simd::shr(const u128x1 &a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
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);
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return _mm_bsrli_si128(a, b / 8);
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}
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#endif
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#ifdef HAVE_X86INTRIN_H
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template<int b>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline ircd::u128x1
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ircd::simd::shl(const u128x1 &a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "xmmx register only shifts right at bytewise resolution."
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);
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return _mm_bslli_si128(a, b / 8);
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}
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#endif
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#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
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template<int b>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline ircd::u256x1
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ircd::simd::shr(const u256x1 &a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "ymmx register only shifts right at bytewise resolution."
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);
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return _mm256_srli_si256(a, b / 8);
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}
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#endif
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#if defined(HAVE_X86INTRIN_H) && defined(__AVX2__)
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template<int b>
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[[using gnu: always_inline, gnu_inline, artificial]]
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extern inline ircd::u256x1
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ircd::simd::shl(const u256x1 &a)
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noexcept
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{
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static_assert
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(
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b % 8 == 0, "ymmx register only shifts right at bytewise resolution."
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);
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return _mm256_slli_si256(a, b / 8);
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}
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#endif
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