mirror of
https://github.com/matrix-construct/construct
synced 2024-08-26 11:25:17 +02:00
278 lines
5.3 KiB
C++
278 lines
5.3 KiB
C++
// Matrix Construct
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//
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// Copyright (C) Matrix Construct Developers, Authors & Contributors
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// Copyright (C) 2016-2019 Jason Volk <jason@zemos.net>
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice is present in all copies. The
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// full license for this software is available in the LICENSE file.
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#pragma once
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#define HAVE_IRCD_PROF_H
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namespace ircd::prof
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{
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struct init;
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struct type;
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struct event;
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struct times;
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struct system;
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struct resource;
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struct syscall_timer;
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enum dpl :uint8_t;
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enum counter :uint8_t;
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enum cacheop :uint8_t;
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using group = std::vector<std::unique_ptr<event>>;
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IRCD_OVERLOAD(sample)
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IRCD_EXCEPTION(ircd::error, error)
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uint64_t cycles(); ///< Monotonic reference cycles (since system boot)
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uint64_t time_user(); ///< Nanoseconds of CPU time in userspace.
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uint64_t time_kern(); ///< Nanoseconds of CPU time in kernelland.
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uint64_t time_real(); ///< Nanoseconds of CPU time real.
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uint64_t time_proc(); ///< Nanoseconds of CPU time for process.
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uint64_t time_thrd(); ///< Nanoseconds of CPU time for thread.
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// Observe
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system &hotsample(system &) noexcept;
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system &operator+=(system &a, const system &b);
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system &operator-=(system &a, const system &b);
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system operator+(const system &a, const system &b);
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system operator-(const system &a, const system &b);
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resource &operator+=(resource &a, const resource &b);
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resource &operator-=(resource &a, const resource &b);
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resource operator+(const resource &a, const resource &b);
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resource operator-(const resource &a, const resource &b);
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// Control
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void stop(group &);
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void start(group &);
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void reset(group &);
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}
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/// X86 platform related
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namespace ircd::prof::x86
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{
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unsigned long long rdpmc(const uint &);
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unsigned long long rdtscp();
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unsigned long long rdtsc();
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}
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namespace ircd
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{
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using prof::cycles;
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}
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struct ircd::prof::times
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{
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uint64_t real {0};
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uint64_t kern {0};
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uint64_t user {0};
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times(sample_t);
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times() = default;
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};
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/// This device intends to figure out when a system call is really slow
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/// or "blocking." The original use-case is for io_submit() in fs::aio.
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/// The sample is conducted with times(2) which is itself a system call,
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/// and the result has poor resolution meaning the result of at() is
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/// generally 0 unless the system call was actually slow.
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struct ircd::prof::syscall_timer
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{
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uint64_t started
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{
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time_kern()
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};
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uint64_t stopped
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{
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0
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};
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uint64_t at() const
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{
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return stopped - started;
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}
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uint64_t stop()
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{
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stopped = time_kern();
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return at();
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}
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};
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struct ircd::prof::resource
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:std::array<uint64_t, 9>
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{
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enum
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{
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TIME_USER, // microseconds
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TIME_KERN, // microseconds
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RSS_MAX,
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PF_MINOR,
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PF_MAJOR,
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BLOCK_IN,
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BLOCK_OUT,
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SCHED_YIELD,
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SCHED_PREEMPT,
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};
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resource(sample_t);
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resource()
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:std::array<uint64_t, 9>{{0}}
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{}
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};
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struct ircd::prof::system
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:std::array<std::array<uint64_t, 2>, 7>
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{
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using array_type = std::array<std::array<uint64_t, 2>, 7>;
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static prof::group group;
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// [N][0] = KERNEL, [N][1] = USER
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//
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// 0: TIME_PROF,
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// 1: TIME_CPU,
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// 2: TIME_TASK,
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// 3: PF_MINOR,
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// 4: PF_MAJOR,
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// 5: SWITCH_TASK,
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// 6: SWITCH_CPU,
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system(sample_t) noexcept;
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system()
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:array_type{{0}}
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{}
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};
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struct ircd::prof::type
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{
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enum dpl dpl {0};
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enum counter counter {0};
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enum cacheop cacheop {0};
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type(const event &);
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type(const enum dpl & = (enum dpl)0,
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const enum counter & = (enum counter)0,
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const enum cacheop & = (enum cacheop)0);
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};
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enum ircd::prof::dpl
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:std::underlying_type<ircd::prof::dpl>::type
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{
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KERNEL,
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USER
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};
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enum ircd::prof::counter
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:std::underlying_type<ircd::prof::counter>::type
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{
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TIME_PROF,
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TIME_CPU,
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TIME_TASK,
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PF_MINOR,
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PF_MAJOR,
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SWITCH_TASK,
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SWITCH_CPU,
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CYCLES,
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RETIRES,
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BRANCHES,
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BRANCHES_MISS,
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CACHES,
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CACHES_MISS,
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STALLS_READ,
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STALLS_RETIRE,
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CACHE_L1D,
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CACHE_L1I,
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CACHE_LL,
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CACHE_TLBD,
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CACHE_TLBI,
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CACHE_BPU,
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CACHE_NODE,
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_NUM
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};
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enum ircd::prof::cacheop
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:std::underlying_type<ircd::prof::cacheop>::type
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{
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READ_ACCESS,
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READ_MISS,
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WRITE_ACCESS,
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WRITE_MISS,
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PREFETCH_ACCESS,
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PREFETCH_MISS,
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};
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struct ircd::prof::init
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{
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init();
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~init() noexcept;
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};
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#if defined(__x86_64__) || defined(__i386__)
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inline uint64_t
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__attribute__((flatten, always_inline, gnu_inline, artificial))
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ircd::prof::cycles()
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{
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return x86::rdtsc();
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}
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#else
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ircd::prof::cycles()
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{
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static_assert(false, "Select reference cycle counter for platform.");
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return 0;
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}
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#endif
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#if defined(__x86_64__) || defined(__i386__)
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inline unsigned long long
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__attribute__((always_inline, gnu_inline, artificial))
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ircd::prof::x86::rdtsc()
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{
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return __builtin_ia32_rdtsc();
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}
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#else
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inline unsigned long long
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ircd::prof::x86::rdtsc()
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{
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return 0;
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}
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#endif
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#if defined(__x86_64__) || defined(__i386__)
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inline unsigned long long
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__attribute__((always_inline, gnu_inline, artificial))
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ircd::prof::x86::rdtscp()
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{
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uint32_t ia32_tsc_aux;
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return __builtin_ia32_rdtscp(&ia32_tsc_aux);
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}
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#else
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inline unsigned long long
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ircd::prof::x86::rdtscp()
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{
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return 0;
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}
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#endif
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#if defined(__x86_64__) || defined(__i386__)
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inline unsigned long long
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__attribute__((always_inline, gnu_inline, artificial))
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ircd::prof::x86::rdpmc(const uint &c)
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{
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return __builtin_ia32_rdpmc(c);
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}
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#else
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inline unsigned long long
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ircd::prof::x86::rdpmc(const uint &c)
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{
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return 0;
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}
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#endif
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