2006-01-17 16:33:01 +01:00
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/* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
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* Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
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*/
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2005-04-17 00:20:36 +02:00
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#ifndef _ASM_PARISC_ATOMIC_H_
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#define _ASM_PARISC_ATOMIC_H_
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2006-01-17 16:33:01 +01:00
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#include <linux/types.h>
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2012-04-01 22:38:42 +02:00
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#include <asm/cmpxchg.h>
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2014-03-13 19:00:36 +01:00
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#include <asm/barrier.h>
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2005-04-17 00:20:36 +02:00
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*
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* And probably incredibly slow on parisc. OTOH, we don't
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* have to write any serious assembly. prumpf
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*/
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#ifdef CONFIG_SMP
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#include <asm/spinlock.h>
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#include <asm/cache.h> /* we use L1_CACHE_BYTES */
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/* Use an array of spinlocks for our atomic_ts.
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* Hash function to index into a different SPINLOCK.
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* Since "a" is usually an address, use one spinlock per cacheline.
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*/
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# define ATOMIC_HASH_SIZE 4
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2009-03-22 04:58:40 +01:00
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# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) (a))/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
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2005-04-17 00:20:36 +02:00
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2009-12-02 19:49:50 +01:00
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extern arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
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2005-04-17 00:20:36 +02:00
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[PATCH] spinlock consolidation
This patch (written by me and also containing many suggestions of Arjan van
de Ven) does a major cleanup of the spinlock code. It does the following
things:
- consolidates and enhances the spinlock/rwlock debugging code
- simplifies the asm/spinlock.h files
- encapsulates the raw spinlock type and moves generic spinlock
features (such as ->break_lock) into the generic code.
- cleans up the spinlock code hierarchy to get rid of the spaghetti.
Most notably there's now only a single variant of the debugging code,
located in lib/spinlock_debug.c. (previously we had one SMP debugging
variant per architecture, plus a separate generic one for UP builds)
Also, i've enhanced the rwlock debugging facility, it will now track
write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too.
All locks have lockup detection now, which will work for both soft and hard
spin/rwlock lockups.
The arch-level include files now only contain the minimally necessary
subset of the spinlock code - all the rest that can be generalized now
lives in the generic headers:
include/asm-i386/spinlock_types.h | 16
include/asm-x86_64/spinlock_types.h | 16
I have also split up the various spinlock variants into separate files,
making it easier to see which does what. The new layout is:
SMP | UP
----------------------------|-----------------------------------
asm/spinlock_types_smp.h | linux/spinlock_types_up.h
linux/spinlock_types.h | linux/spinlock_types.h
asm/spinlock_smp.h | linux/spinlock_up.h
linux/spinlock_api_smp.h | linux/spinlock_api_up.h
linux/spinlock.h | linux/spinlock.h
/*
* here's the role of the various spinlock/rwlock related include files:
*
* on SMP builds:
*
* asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
* initializers
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel
* implementations, mostly inline assembly code
*
* (also included on UP-debug builds:)
*
* linux/spinlock_api_smp.h:
* contains the prototypes for the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*
* on UP builds:
*
* linux/spinlock_type_up.h:
* contains the generic, simplified UP spinlock type.
* (which is an empty structure on non-debug builds)
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* linux/spinlock_up.h:
* contains the __raw_spin_*()/etc. version of UP
* builds. (which are NOPs on non-debug, non-preempt
* builds)
*
* (included on UP-non-debug builds:)
*
* linux/spinlock_api_up.h:
* builds the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*/
All SMP and UP architectures are converted by this patch.
arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should
be mostly fine.
From: Grant Grundler <grundler@parisc-linux.org>
Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
Builds 32-bit SMP kernel (not booted or tested). I did not try to build
non-SMP kernels. That should be trivial to fix up later if necessary.
I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids
some ugly nesting of linux/*.h and asm/*.h files. Those particular locks
are well tested and contained entirely inside arch specific code. I do NOT
expect any new issues to arise with them.
If someone does ever need to use debug/metrics with them, then they will
need to unravel this hairball between spinlocks, atomic ops, and bit ops
that exist only because parisc has exactly one atomic instruction: LDCW
(load and clear word).
From: "Luck, Tony" <tony.luck@intel.com>
ia64 fix
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjanv@infradead.org>
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Cc: Matthew Wilcox <willy@debian.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se>
Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-10 09:25:56 +02:00
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/* Can't use raw_spin_lock_irq because of #include problems, so
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2005-04-17 00:20:36 +02:00
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* this is the substitute */
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#define _atomic_spin_lock_irqsave(l,f) do { \
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2009-12-02 19:49:50 +01:00
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arch_spinlock_t *s = ATOMIC_HASH(l); \
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2005-04-17 00:20:36 +02:00
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local_irq_save(f); \
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2009-12-02 20:01:25 +01:00
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arch_spin_lock(s); \
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2005-04-17 00:20:36 +02:00
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} while(0)
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#define _atomic_spin_unlock_irqrestore(l,f) do { \
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2009-12-02 19:49:50 +01:00
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arch_spinlock_t *s = ATOMIC_HASH(l); \
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2009-12-02 20:01:25 +01:00
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arch_spin_unlock(s); \
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2005-04-17 00:20:36 +02:00
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local_irq_restore(f); \
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} while(0)
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#else
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# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
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# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
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#endif
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2009-01-06 23:40:39 +01:00
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/*
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* Note that we need not lock read accesses - aligned word writes/reads
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* are atomic, so a reader never sees inconsistent values.
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2006-01-17 16:33:01 +01:00
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*/
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2005-04-17 00:20:36 +02:00
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2014-03-26 18:04:44 +01:00
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static __inline__ void atomic_set(atomic_t *v, int i)
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2005-04-17 00:20:36 +02:00
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{
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unsigned long flags;
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_atomic_spin_lock_irqsave(v, flags);
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v->counter = i;
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_atomic_spin_unlock_irqrestore(v, flags);
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}
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static __inline__ int atomic_read(const atomic_t *v)
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{
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2015-09-18 11:13:10 +02:00
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return READ_ONCE((v)->counter);
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2005-04-17 00:20:36 +02:00
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}
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/* exported interface */
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2007-05-08 09:34:26 +02:00
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#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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2006-01-10 00:59:17 +01:00
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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2005-04-17 00:20:36 +02:00
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2005-11-14 01:07:25 +01:00
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/**
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2011-07-27 01:09:07 +02:00
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* __atomic_add_unless - add unless the number is a given value
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2005-11-14 01:07:25 +01:00
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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2011-07-27 01:09:07 +02:00
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* Returns the old value of @v.
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2005-11-14 01:07:25 +01:00
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*/
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2011-07-27 01:09:07 +02:00
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static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
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2007-05-08 09:34:38 +02:00
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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2011-07-27 01:09:07 +02:00
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return c;
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2007-05-08 09:34:38 +02:00
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}
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2014-03-26 18:04:44 +01:00
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#define ATOMIC_OP(op, c_op) \
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static __inline__ void atomic_##op(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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v->counter c_op i; \
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_atomic_spin_unlock_irqrestore(v, flags); \
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} \
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#define ATOMIC_OP_RETURN(op, c_op) \
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static __inline__ int atomic_##op##_return(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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int ret; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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ret = (v->counter c_op i); \
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_atomic_spin_unlock_irqrestore(v, flags); \
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\
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return ret; \
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}
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#define ATOMIC_OPS(op, c_op) ATOMIC_OP(op, c_op) ATOMIC_OP_RETURN(op, c_op)
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ATOMIC_OPS(add, +=)
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ATOMIC_OPS(sub, -=)
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2014-04-23 19:47:25 +02:00
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ATOMIC_OP(and, &=)
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ATOMIC_OP(or, |=)
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ATOMIC_OP(xor, ^=)
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2014-03-26 18:04:44 +01:00
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#undef ATOMIC_OPS
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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2005-11-14 01:07:25 +01:00
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2014-03-26 18:04:44 +01:00
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#define atomic_inc(v) (atomic_add( 1,(v)))
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#define atomic_dec(v) (atomic_add( -1,(v)))
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2005-04-17 00:20:36 +02:00
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2014-03-26 18:04:44 +01:00
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#define atomic_inc_return(v) (atomic_add_return( 1,(v)))
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#define atomic_dec_return(v) (atomic_add_return( -1,(v)))
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2005-04-17 00:20:36 +02:00
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#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
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2006-03-30 02:47:32 +02:00
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#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
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2012-07-23 13:16:19 +02:00
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#define ATOMIC_INIT(i) { (i) }
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2005-04-17 00:20:36 +02:00
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2007-01-28 15:09:20 +01:00
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#ifdef CONFIG_64BIT
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2006-01-17 16:33:01 +01:00
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2012-07-23 13:16:19 +02:00
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#define ATOMIC64_INIT(i) { (i) }
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2006-01-17 16:33:01 +01:00
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2014-03-26 18:04:44 +01:00
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#define ATOMIC64_OP(op, c_op) \
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static __inline__ void atomic64_##op(s64 i, atomic64_t *v) \
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{ \
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unsigned long flags; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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v->counter c_op i; \
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_atomic_spin_unlock_irqrestore(v, flags); \
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} \
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#define ATOMIC64_OP_RETURN(op, c_op) \
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static __inline__ s64 atomic64_##op##_return(s64 i, atomic64_t *v) \
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{ \
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unsigned long flags; \
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s64 ret; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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ret = (v->counter c_op i); \
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_atomic_spin_unlock_irqrestore(v, flags); \
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\
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return ret; \
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}
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2006-01-17 16:33:01 +01:00
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2014-03-26 18:04:44 +01:00
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#define ATOMIC64_OPS(op, c_op) ATOMIC64_OP(op, c_op) ATOMIC64_OP_RETURN(op, c_op)
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2006-01-17 16:33:01 +01:00
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2014-03-26 18:04:44 +01:00
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ATOMIC64_OPS(add, +=)
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ATOMIC64_OPS(sub, -=)
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2014-04-23 19:47:25 +02:00
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ATOMIC64_OP(and, &=)
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ATOMIC64_OP(or, |=)
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ATOMIC64_OP(xor, ^=)
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2014-03-26 18:04:44 +01:00
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#undef ATOMIC64_OPS
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#undef ATOMIC64_OP_RETURN
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#undef ATOMIC64_OP
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2006-01-17 16:33:01 +01:00
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static __inline__ void
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atomic64_set(atomic64_t *v, s64 i)
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{
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unsigned long flags;
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_atomic_spin_lock_irqsave(v, flags);
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v->counter = i;
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_atomic_spin_unlock_irqrestore(v, flags);
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}
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static __inline__ s64
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atomic64_read(const atomic64_t *v)
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{
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2014-09-23 16:29:50 +02:00
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return ACCESS_ONCE((v)->counter);
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2006-01-17 16:33:01 +01:00
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}
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2014-03-26 18:04:44 +01:00
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#define atomic64_inc(v) (atomic64_add( 1,(v)))
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#define atomic64_dec(v) (atomic64_add( -1,(v)))
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2006-01-17 16:33:01 +01:00
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2014-03-26 18:04:44 +01:00
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#define atomic64_inc_return(v) (atomic64_add_return( 1,(v)))
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#define atomic64_dec_return(v) (atomic64_add_return( -1,(v)))
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2006-01-17 16:33:01 +01:00
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#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
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#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
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#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
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2006-03-30 02:47:32 +02:00
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#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
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2006-01-17 16:33:01 +01:00
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2007-05-08 09:34:26 +02:00
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/* exported interface */
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#define atomic64_cmpxchg(v, o, n) \
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((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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* atomic64_add_unless - add unless the number is a given value
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* @v: pointer of type atomic64_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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2011-07-27 01:09:07 +02:00
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* Returns the old value of @v.
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2007-05-08 09:34:26 +02:00
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*/
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2007-05-08 09:34:38 +02:00
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static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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long c, old;
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c = atomic64_read(v);
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for (;;) {
|
|
|
|
if (unlikely(c == (u)))
|
|
|
|
break;
|
|
|
|
old = atomic64_cmpxchg((v), c, c + (a));
|
|
|
|
if (likely(old == c))
|
|
|
|
break;
|
|
|
|
c = old;
|
|
|
|
}
|
|
|
|
return c != (u);
|
|
|
|
}
|
|
|
|
|
2007-05-08 09:34:26 +02:00
|
|
|
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
|
|
|
|
|
2013-05-06 21:13:33 +02:00
|
|
|
/*
|
|
|
|
* atomic64_dec_if_positive - decrement by 1 if old value positive
|
|
|
|
* @v: pointer of type atomic_t
|
|
|
|
*
|
|
|
|
* The function returns the old value of *v minus 1, even if
|
|
|
|
* the atomic variable, v, was not decremented.
|
|
|
|
*/
|
|
|
|
static inline long atomic64_dec_if_positive(atomic64_t *v)
|
|
|
|
{
|
|
|
|
long c, old, dec;
|
|
|
|
c = atomic64_read(v);
|
|
|
|
for (;;) {
|
|
|
|
dec = c - 1;
|
|
|
|
if (unlikely(dec < 0))
|
|
|
|
break;
|
|
|
|
old = atomic64_cmpxchg((v), c, dec);
|
|
|
|
if (likely(old == c))
|
|
|
|
break;
|
|
|
|
c = old;
|
|
|
|
}
|
|
|
|
return dec;
|
|
|
|
}
|
|
|
|
|
2009-07-02 19:10:29 +02:00
|
|
|
#endif /* !CONFIG_64BIT */
|
2006-01-17 16:33:01 +01:00
|
|
|
|
|
|
|
|
|
|
|
#endif /* _ASM_PARISC_ATOMIC_H_ */
|