6c3a158316
The previous implementation was relying on compile time optimizations based on a constant clock rate. However, support for different PXA flavors in the same kernel binary requires that the clock be selected at run time, so here it is. Let's move this code to a more appropriate location while at it. Signed-off-by: Nicolas Pitre <npitre@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
349 lines
7.1 KiB
C
349 lines
7.1 KiB
C
/*
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* linux/arch/arm/mach-pxa/generic.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* Code common to all PXA machines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Since this file should be linked before any other machine specific file,
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* the __initcall() here will be executed first. This serves as default
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* initialization stuff for PXA machines which can be overridden later if
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* need be.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/ioport.h>
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#include <linux/pm.h>
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#include <linux/string.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/mach/map.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/udc.h>
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#include <asm/arch/pxafb.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/irda.h>
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#include <asm/arch/i2c.h>
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#include "devices.h"
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#include "generic.h"
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/*
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* Handy function to set GPIO alternate functions
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*/
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int pxa_gpio_mode(int gpio_mode)
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{
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unsigned long flags;
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int gpio = gpio_mode & GPIO_MD_MASK_NR;
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int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
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int gafr;
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if (gpio > PXA_LAST_GPIO)
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return -EINVAL;
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local_irq_save(flags);
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if (gpio_mode & GPIO_DFLT_LOW)
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GPCR(gpio) = GPIO_bit(gpio);
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else if (gpio_mode & GPIO_DFLT_HIGH)
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GPSR(gpio) = GPIO_bit(gpio);
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if (gpio_mode & GPIO_MD_MASK_DIR)
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GPDR(gpio) |= GPIO_bit(gpio);
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else
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GPDR(gpio) &= ~GPIO_bit(gpio);
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gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
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GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
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local_irq_restore(flags);
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return 0;
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}
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EXPORT_SYMBOL(pxa_gpio_mode);
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/*
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* Return GPIO level
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*/
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int pxa_gpio_get_value(unsigned gpio)
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{
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return __gpio_get_value(gpio);
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}
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EXPORT_SYMBOL(pxa_gpio_get_value);
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/*
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* Set output GPIO level
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*/
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void pxa_gpio_set_value(unsigned gpio, int value)
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{
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__gpio_set_value(gpio, value);
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}
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EXPORT_SYMBOL(pxa_gpio_set_value);
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/*
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* Routine to safely enable or disable a clock in the CKEN
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*/
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void pxa_set_cken(int clock, int enable)
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{
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unsigned long flags;
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local_irq_save(flags);
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if (enable)
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CKEN |= (1 << clock);
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else
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CKEN &= ~(1 << clock);
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(pxa_set_cken);
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/*
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* Intel PXA2xx internal register mapping.
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*
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* Note 1: not all PXA2xx variants implement all those addresses.
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*
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* Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
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* and cache flush area.
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*/
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static struct map_desc standard_io_desc[] __initdata = {
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{ /* Devs */
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.virtual = 0xf2000000,
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.pfn = __phys_to_pfn(0x40000000),
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.length = 0x02000000,
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.type = MT_DEVICE
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}, { /* LCD */
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.virtual = 0xf4000000,
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.pfn = __phys_to_pfn(0x44000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* Mem Ctl */
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.virtual = 0xf6000000,
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.pfn = __phys_to_pfn(0x48000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* USB host */
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.virtual = 0xf8000000,
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.pfn = __phys_to_pfn(0x4c000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* Camera */
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.virtual = 0xfa000000,
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.pfn = __phys_to_pfn(0x50000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* IMem ctl */
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.virtual = 0xfe000000,
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.pfn = __phys_to_pfn(0x58000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* UNCACHED_PHYS_0 */
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.virtual = 0xff000000,
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.pfn = __phys_to_pfn(0x00000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}
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};
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void __init pxa_map_io(void)
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{
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iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
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get_clk_frequency_khz(1);
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}
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static struct resource pxamci_resources[] = {
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[0] = {
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.start = 0x41100000,
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.end = 0x41100fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_MMC,
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.end = IRQ_MMC,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 pxamci_dmamask = 0xffffffffUL;
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struct platform_device pxa_device_mci = {
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.name = "pxa2xx-mci",
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.id = -1,
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.dev = {
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.dma_mask = &pxamci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxamci_resources),
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.resource = pxamci_resources,
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};
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void __init pxa_set_mci_info(struct pxamci_platform_data *info)
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{
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pxa_device_mci.dev.platform_data = info;
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}
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static struct pxa2xx_udc_mach_info pxa_udc_info;
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void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
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{
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memcpy(&pxa_udc_info, info, sizeof *info);
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}
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static struct resource pxa2xx_udc_resources[] = {
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[0] = {
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.start = 0x40600000,
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.end = 0x4060ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_USB,
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.end = IRQ_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dma_mask = ~(u32)0;
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struct platform_device pxa_device_udc = {
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.name = "pxa2xx-udc",
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.id = -1,
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.resource = pxa2xx_udc_resources,
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.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
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.dev = {
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.platform_data = &pxa_udc_info,
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.dma_mask = &udc_dma_mask,
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}
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};
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static struct resource pxafb_resources[] = {
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[0] = {
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.start = 0x44000000,
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.end = 0x4400ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_LCD,
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.end = IRQ_LCD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 fb_dma_mask = ~(u64)0;
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struct platform_device pxa_device_fb = {
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.name = "pxa2xx-fb",
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.id = -1,
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.dev = {
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.dma_mask = &fb_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxafb_resources),
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.resource = pxafb_resources,
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};
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void __init set_pxa_fb_info(struct pxafb_mach_info *info)
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{
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pxa_device_fb.dev.platform_data = info;
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}
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void __init set_pxa_fb_parent(struct device *parent_dev)
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{
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pxa_device_fb.dev.parent = parent_dev;
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}
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struct platform_device pxa_device_ffuart= {
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.name = "pxa2xx-uart",
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.id = 0,
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};
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struct platform_device pxa_device_btuart = {
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.name = "pxa2xx-uart",
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.id = 1,
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};
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struct platform_device pxa_device_stuart = {
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.name = "pxa2xx-uart",
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.id = 2,
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};
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struct platform_device pxa_device_hwuart = {
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.name = "pxa2xx-uart",
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.id = 3,
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};
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static struct resource pxai2c_resources[] = {
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{
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.start = 0x40301680,
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.end = 0x403016a3,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_I2C,
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.end = IRQ_I2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa_device_i2c = {
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.name = "pxa2xx-i2c",
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.id = 0,
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.resource = pxai2c_resources,
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.num_resources = ARRAY_SIZE(pxai2c_resources),
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};
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void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
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{
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pxa_device_i2c.dev.platform_data = info;
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}
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static struct resource pxai2s_resources[] = {
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{
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.start = 0x40400000,
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.end = 0x40400083,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_I2S,
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.end = IRQ_I2S,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa_device_i2s = {
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.name = "pxa2xx-i2s",
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.id = -1,
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.resource = pxai2s_resources,
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.num_resources = ARRAY_SIZE(pxai2s_resources),
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};
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static u64 pxaficp_dmamask = ~(u32)0;
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struct platform_device pxa_device_ficp = {
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.name = "pxa2xx-ir",
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.id = -1,
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.dev = {
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.dma_mask = &pxaficp_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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};
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void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
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{
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pxa_device_ficp.dev.platform_data = info;
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}
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struct platform_device pxa_device_rtc = {
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.name = "sa1100-rtc",
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.id = -1,
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};
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