After "ARM: signal: sigreturn_codes should be endian neutral to work in BE8" commit, thumb only platforms, like armv7m, fails to compile sigreturn_codes.S. The reason is that for such arch values '.arm' directive and arm opcodes are not allowed. Fix conditionally enables arm opcodes only if no CONFIG_CPU_THUMBONLY defined and it uses .org instructions to keep sigreturn_codes layout. Suggested-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
102 lines
2.8 KiB
ArmAsm
102 lines
2.8 KiB
ArmAsm
/*
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* sigreturn_codes.S - code sinpets for sigreturn syscalls
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*
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* Created by: Victor Kamensky, 2013-08-13
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* Copyright: (C) 2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <asm/unistd.h>
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/*
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* For ARM syscalls, we encode the syscall number into the instruction.
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* With EABI, the syscall number has to be loaded into r7. As result
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* ARM syscall sequence snippet will have move and svc in .arm encoding
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*
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* For Thumb syscalls, we pass the syscall number via r7. We therefore
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* need two 16-bit instructions in .thumb encoding
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*
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* Please note sigreturn_codes code are not executed in place. Instead
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* they just copied by kernel into appropriate places. Code inside of
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* arch/arm/kernel/signal.c is very sensitive to layout of these code
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* snippets.
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*/
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/*
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* In CPU_THUMBONLY case kernel arm opcodes are not allowed.
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* Note in this case codes skips those instructions but it uses .org
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* directive to keep correct layout of sigreturn_codes array.
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*/
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#ifndef CONFIG_CPU_THUMBONLY
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#define ARM_OK(code...) code
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#else
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#define ARM_OK(code...)
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#endif
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.macro arm_slot n
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.org sigreturn_codes + 12 * (\n)
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ARM_OK( .arm )
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.endm
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.macro thumb_slot n
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.org sigreturn_codes + 12 * (\n) + 8
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.thumb
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.endm
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#if __LINUX_ARM_ARCH__ <= 4
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/*
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* Note we manually set minimally required arch that supports
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* required thumb opcodes for early arch versions. It is OK
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* for this file to be used in combination with other
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* lower arch variants, since these code snippets are only
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* used as input data.
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*/
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.arch armv4t
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#endif
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.section .rodata
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.global sigreturn_codes
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.type sigreturn_codes, #object
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.align
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sigreturn_codes:
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/* ARM sigreturn syscall code snippet */
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arm_slot 0
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ARM_OK( mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) )
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ARM_OK( swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
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/* Thumb sigreturn syscall code snippet */
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thumb_slot 0
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movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
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swi #0
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/* ARM sigreturn_rt syscall code snippet */
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arm_slot 1
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ARM_OK( mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) )
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ARM_OK( swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
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/* Thumb sigreturn_rt syscall code snippet */
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thumb_slot 1
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movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
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swi #0
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/*
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* Note on addtional space: setup_return in signal.c
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* algorithm uses two words copy regardless whether
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* it is thumb case or not, so we need additional
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* word after real last entry.
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*/
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arm_slot 2
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.space 4
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.size sigreturn_codes, . - sigreturn_codes
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