Make sure that xen_swiotlb_init allocates buffers that are DMA capable when at least one memblock is available below 4G. Otherwise we assume that all devices on the SoC can cope with >4G addresses. We do this on ARM and ARM64, where dom0 is mapped 1:1, so pfn == mfn in this case. No functional changes on x86. From: Chen Baozi <baozich@gmail.com> Signed-off-by: Chen Baozi <baozich@gmail.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Tested-by: Chen Baozi <baozich@gmail.com> Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: David Vrabel <david.vrabel@citrix.com>
201 lines
5.1 KiB
C
201 lines
5.1 KiB
C
#include <linux/cpu.h>
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#include <linux/dma-mapping.h>
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#include <linux/bootmem.h>
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#include <linux/gfp.h>
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#include <linux/highmem.h>
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#include <linux/export.h>
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#include <linux/memblock.h>
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#include <linux/of_address.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/dma-mapping.h>
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#include <linux/vmalloc.h>
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#include <linux/swiotlb.h>
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#include <xen/xen.h>
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#include <xen/interface/grant_table.h>
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#include <xen/interface/memory.h>
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#include <xen/swiotlb-xen.h>
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#include <asm/cacheflush.h>
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#include <asm/xen/page.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/interface.h>
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unsigned long xen_get_swiotlb_free_pages(unsigned int order)
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{
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struct memblock_region *reg;
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gfp_t flags = __GFP_NOWARN;
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for_each_memblock(memory, reg) {
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if (reg->base < (phys_addr_t)0xffffffff) {
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flags |= __GFP_DMA;
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break;
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}
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}
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return __get_free_pages(flags, order);
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}
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enum dma_cache_op {
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DMA_UNMAP,
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DMA_MAP,
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};
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static bool hypercall_cflush = false;
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/* functions called by SWIOTLB */
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static void dma_cache_maint(dma_addr_t handle, unsigned long offset,
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size_t size, enum dma_data_direction dir, enum dma_cache_op op)
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{
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struct gnttab_cache_flush cflush;
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unsigned long pfn;
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size_t left = size;
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pfn = (handle >> PAGE_SHIFT) + offset / PAGE_SIZE;
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offset %= PAGE_SIZE;
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do {
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size_t len = left;
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/* buffers in highmem or foreign pages cannot cross page
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* boundaries */
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if (len + offset > PAGE_SIZE)
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len = PAGE_SIZE - offset;
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cflush.op = 0;
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cflush.a.dev_bus_addr = pfn << PAGE_SHIFT;
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cflush.offset = offset;
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cflush.length = len;
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if (op == DMA_UNMAP && dir != DMA_TO_DEVICE)
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cflush.op = GNTTAB_CACHE_INVAL;
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if (op == DMA_MAP) {
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if (dir == DMA_FROM_DEVICE)
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cflush.op = GNTTAB_CACHE_INVAL;
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else
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cflush.op = GNTTAB_CACHE_CLEAN;
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}
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if (cflush.op)
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HYPERVISOR_grant_table_op(GNTTABOP_cache_flush, &cflush, 1);
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offset = 0;
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pfn++;
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left -= len;
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} while (left);
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}
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static void __xen_dma_page_dev_to_cpu(struct device *hwdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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dma_cache_maint(handle & PAGE_MASK, handle & ~PAGE_MASK, size, dir, DMA_UNMAP);
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}
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static void __xen_dma_page_cpu_to_dev(struct device *hwdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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dma_cache_maint(handle & PAGE_MASK, handle & ~PAGE_MASK, size, dir, DMA_MAP);
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}
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void __xen_dma_map_page(struct device *hwdev, struct page *page,
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dma_addr_t dev_addr, unsigned long offset, size_t size,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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if (dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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return;
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__xen_dma_page_cpu_to_dev(hwdev, dev_addr, size, dir);
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}
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void __xen_dma_unmap_page(struct device *hwdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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if (dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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return;
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__xen_dma_page_dev_to_cpu(hwdev, handle, size, dir);
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}
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void __xen_dma_sync_single_for_cpu(struct device *hwdev,
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dma_addr_t handle, size_t size, enum dma_data_direction dir)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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__xen_dma_page_dev_to_cpu(hwdev, handle, size, dir);
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}
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void __xen_dma_sync_single_for_device(struct device *hwdev,
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dma_addr_t handle, size_t size, enum dma_data_direction dir)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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__xen_dma_page_cpu_to_dev(hwdev, handle, size, dir);
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}
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bool xen_arch_need_swiotlb(struct device *dev,
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unsigned long pfn,
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unsigned long mfn)
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{
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return (!hypercall_cflush && (pfn != mfn) && !is_device_dma_coherent(dev));
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}
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int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
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unsigned int address_bits,
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dma_addr_t *dma_handle)
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{
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if (!xen_initial_domain())
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return -EINVAL;
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/* we assume that dom0 is mapped 1:1 for now */
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*dma_handle = pstart;
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return 0;
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}
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EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
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void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
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{
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return;
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}
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EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
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struct dma_map_ops *xen_dma_ops;
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EXPORT_SYMBOL(xen_dma_ops);
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static struct dma_map_ops xen_swiotlb_dma_ops = {
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.mapping_error = xen_swiotlb_dma_mapping_error,
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.alloc = xen_swiotlb_alloc_coherent,
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.free = xen_swiotlb_free_coherent,
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.sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu,
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.sync_single_for_device = xen_swiotlb_sync_single_for_device,
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.sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = xen_swiotlb_sync_sg_for_device,
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.map_sg = xen_swiotlb_map_sg_attrs,
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.unmap_sg = xen_swiotlb_unmap_sg_attrs,
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.map_page = xen_swiotlb_map_page,
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.unmap_page = xen_swiotlb_unmap_page,
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.dma_supported = xen_swiotlb_dma_supported,
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.set_dma_mask = xen_swiotlb_set_dma_mask,
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};
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int __init xen_mm_init(void)
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{
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struct gnttab_cache_flush cflush;
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if (!xen_initial_domain())
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return 0;
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xen_swiotlb_init(1, false);
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xen_dma_ops = &xen_swiotlb_dma_ops;
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cflush.op = 0;
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cflush.a.dev_bus_addr = 0;
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cflush.offset = 0;
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cflush.length = 0;
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if (HYPERVISOR_grant_table_op(GNTTABOP_cache_flush, &cflush, 1) != -ENOSYS)
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hypercall_cflush = true;
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return 0;
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}
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arch_initcall(xen_mm_init);
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