The main change here is a significant head.S rework that allows us to boot on machines with physical memory at a really high address without having to increase our mapped VA range. Other changes include: - AES performance boost for Cortex-A57 - AArch32 (compat) userspace with 64k pages - Cortex-A53 erratum workaround for #845719 - defconfig updates (new platforms, PCI, ...) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJVLnQpAAoJELescNyEwWM03RIH/iwcDc0MBZgkwfD5cnY+29p4 m89lMDo3SyGQT4NynHSw7P3R7c3zULmI+9hmJMw/yfjjjL6m7X+vVAF3xj1Am4Al OzCqYLHyFnlRktzJ6dWeF1Ese7tWqPpxn+OCXgYNpz/r5MfF/HhlyX/qNzAQPKrw ZpDvnt44DgUfweqjTbwQUg2wkyCRjmz57MQYxDcmJStdpHIu24jWOvDIo3OJGjyS L49I9DU6DGUhkISZmmBE0T7vmKMD1BcgI7OIzX2WIqn521QT+GSLMhRxaHmK1s1V A8gaMTwpo0xFhTAt7sbw/5+2663WmfRdZI+FtduvORsoxX6KdDn7DH1NQixIm8s= =+F0I -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "Here are the core arm64 updates for 4.1. Highlights include a significant rework to head.S (allowing us to boot on machines with physical memory at a really high address), an AES performance boost on Cortex-A57 and the ability to run a 32-bit userspace with 64k pages (although this requires said userspace to be built with a recent binutils). The head.S rework spilt over into KVM, so there are some changes under arch/arm/ which have been acked by Marc Zyngier (KVM co-maintainer). In particular, the linker script changes caused us some issues in -next, so there are a few merge commits where we had to apply fixes on top of a stable branch. Other changes include: - AES performance boost for Cortex-A57 - AArch32 (compat) userspace with 64k pages - Cortex-A53 erratum workaround for #845719 - defconfig updates (new platforms, PCI, ...)" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (39 commits) arm64: fix midr range for Cortex-A57 erratum 832075 arm64: errata: add workaround for cortex-a53 erratum #845719 arm64: Use bool function return values of true/false not 1/0 arm64: defconfig: updates for 4.1 arm64: Extract feature parsing code from cpu_errata.c arm64: alternative: Allow immediate branch as alternative instruction arm64: insn: Add aarch64_insn_decode_immediate ARM: kvm: round HYP section to page size instead of log2 upper bound ARM: kvm: assert on HYP section boundaries not actual code size arm64: head.S: ensure idmap_t0sz is visible arm64: pmu: add support for interrupt-affinity property dt: pmu: extend ARM PMU binding to allow for explicit interrupt affinity arm64: head.S: ensure visibility of page tables arm64: KVM: use ID map with increased VA range if required arm64: mm: increase VA range of identity map ARM: kvm: implement replacement for ld's LOG2CEIL() arm64: proc: remove unused cpu_get_pgd macro arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol arm64: remove __calc_phys_offset arm64: merge __enable_mmu and __turn_mmu_on ...
353 lines
7.1 KiB
ArmAsm
353 lines
7.1 KiB
ArmAsm
/* ld script to make ARM Linux kernel
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* taken from the i386 version by Russell King
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* Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*/
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/page.h>
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#ifdef CONFIG_ARM_KERNMEM_PERMS
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#include <asm/pgtable.h>
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#endif
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#define PROC_INFO \
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. = ALIGN(4); \
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VMLINUX_SYMBOL(__proc_info_begin) = .; \
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*(.proc.info.init) \
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VMLINUX_SYMBOL(__proc_info_end) = .;
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#define IDMAP_TEXT \
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ALIGN_FUNCTION(); \
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VMLINUX_SYMBOL(__idmap_text_start) = .; \
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*(.idmap.text) \
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VMLINUX_SYMBOL(__idmap_text_end) = .; \
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. = ALIGN(PAGE_SIZE); \
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VMLINUX_SYMBOL(__hyp_idmap_text_start) = .; \
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*(.hyp.idmap.text) \
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VMLINUX_SYMBOL(__hyp_idmap_text_end) = .;
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#ifdef CONFIG_HOTPLUG_CPU
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#define ARM_CPU_DISCARD(x)
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#define ARM_CPU_KEEP(x) x
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#else
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#define ARM_CPU_DISCARD(x) x
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#define ARM_CPU_KEEP(x)
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#endif
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#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
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defined(CONFIG_GENERIC_BUG)
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#define ARM_EXIT_KEEP(x) x
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#define ARM_EXIT_DISCARD(x)
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#else
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#define ARM_EXIT_KEEP(x)
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#define ARM_EXIT_DISCARD(x) x
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#endif
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OUTPUT_ARCH(arm)
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ENTRY(stext)
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#ifndef __ARMEB__
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jiffies = jiffies_64;
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#else
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jiffies = jiffies_64 + 4;
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#endif
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SECTIONS
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{
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/*
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* XXX: The linker does not define how output sections are
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* assigned to input sections when there are multiple statements
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* matching the same input section name. There is no documented
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* order of matching.
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*
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* unwind exit sections must be discarded before the rest of the
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* unwind sections get included.
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*/
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/DISCARD/ : {
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*(.ARM.exidx.exit.text)
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*(.ARM.extab.exit.text)
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ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text))
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ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text))
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ARM_EXIT_DISCARD(EXIT_TEXT)
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ARM_EXIT_DISCARD(EXIT_DATA)
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EXIT_CALL
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#ifndef CONFIG_MMU
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*(.text.fixup)
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*(__ex_table)
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#endif
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#ifndef CONFIG_SMP_ON_UP
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*(.alt.smp.init)
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#endif
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*(.discard)
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*(.discard.*)
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}
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#ifdef CONFIG_XIP_KERNEL
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. = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
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#else
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. = PAGE_OFFSET + TEXT_OFFSET;
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#endif
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.head.text : {
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_text = .;
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HEAD_TEXT
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}
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#ifdef CONFIG_ARM_KERNMEM_PERMS
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. = ALIGN(1<<SECTION_SHIFT);
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#endif
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.text : { /* Real text segment */
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_stext = .; /* Text and read-only data */
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IDMAP_TEXT
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__exception_text_start = .;
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*(.exception.text)
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__exception_text_end = .;
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IRQENTRY_TEXT
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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*(.gnu.warning)
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*(.glue_7)
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*(.glue_7t)
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. = ALIGN(4);
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*(.got) /* Global offset table */
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ARM_CPU_KEEP(PROC_INFO)
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}
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#ifdef CONFIG_DEBUG_RODATA
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. = ALIGN(1<<SECTION_SHIFT);
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#endif
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RO_DATA(PAGE_SIZE)
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. = ALIGN(4);
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__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
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__start___ex_table = .;
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#ifdef CONFIG_MMU
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*(__ex_table)
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#endif
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__stop___ex_table = .;
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}
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#ifdef CONFIG_ARM_UNWIND
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/*
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* Stack unwinding tables
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*/
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. = ALIGN(8);
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.ARM.unwind_idx : {
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__start_unwind_idx = .;
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*(.ARM.exidx*)
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__stop_unwind_idx = .;
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}
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.ARM.unwind_tab : {
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__start_unwind_tab = .;
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*(.ARM.extab*)
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__stop_unwind_tab = .;
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}
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#endif
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NOTES
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_etext = .; /* End of text and rodata section */
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#ifndef CONFIG_XIP_KERNEL
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# ifdef CONFIG_ARM_KERNMEM_PERMS
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. = ALIGN(1<<SECTION_SHIFT);
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# else
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. = ALIGN(PAGE_SIZE);
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# endif
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__init_begin = .;
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#endif
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/*
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* The vectors and stubs are relocatable code, and the
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* only thing that matters is their relative offsets
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*/
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__vectors_start = .;
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.vectors 0 : AT(__vectors_start) {
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*(.vectors)
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}
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. = __vectors_start + SIZEOF(.vectors);
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__vectors_end = .;
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__stubs_start = .;
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.stubs 0x1000 : AT(__stubs_start) {
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*(.stubs)
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}
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. = __stubs_start + SIZEOF(.stubs);
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__stubs_end = .;
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INIT_TEXT_SECTION(8)
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.exit.text : {
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ARM_EXIT_KEEP(EXIT_TEXT)
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}
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.init.proc.info : {
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ARM_CPU_DISCARD(PROC_INFO)
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}
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.init.arch.info : {
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__arch_info_begin = .;
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*(.arch.info.init)
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__arch_info_end = .;
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}
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.init.tagtable : {
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__tagtable_begin = .;
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*(.taglist.init)
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__tagtable_end = .;
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}
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#ifdef CONFIG_SMP_ON_UP
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.init.smpalt : {
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__smpalt_begin = .;
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*(.alt.smp.init)
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__smpalt_end = .;
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}
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#endif
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.init.pv_table : {
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__pv_table_begin = .;
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*(.pv_table)
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__pv_table_end = .;
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}
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.init.data : {
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#ifndef CONFIG_XIP_KERNEL
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INIT_DATA
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#endif
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INIT_SETUP(16)
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INIT_CALLS
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CON_INITCALL
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SECURITY_INITCALL
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INIT_RAM_FS
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}
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#ifndef CONFIG_XIP_KERNEL
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.exit.data : {
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ARM_EXIT_KEEP(EXIT_DATA)
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}
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#endif
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#ifdef CONFIG_SMP
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PERCPU_SECTION(L1_CACHE_BYTES)
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#endif
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#ifdef CONFIG_XIP_KERNEL
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__data_loc = ALIGN(4); /* location in binary */
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. = PAGE_OFFSET + TEXT_OFFSET;
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#else
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#ifdef CONFIG_ARM_KERNMEM_PERMS
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. = ALIGN(1<<SECTION_SHIFT);
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#else
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. = ALIGN(THREAD_SIZE);
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#endif
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__init_end = .;
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__data_loc = .;
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#endif
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.data : AT(__data_loc) {
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_data = .; /* address in memory */
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_sdata = .;
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/*
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* first, the init task union, aligned
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* to an 8192 byte boundary.
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*/
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INIT_TASK_DATA(THREAD_SIZE)
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#ifdef CONFIG_XIP_KERNEL
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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INIT_DATA
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ARM_EXIT_KEEP(EXIT_DATA)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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#endif
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NOSAVE_DATA
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CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
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READ_MOSTLY_DATA(L1_CACHE_BYTES)
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/*
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* and the usual data section
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*/
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DATA_DATA
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CONSTRUCTORS
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_edata = .;
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}
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_edata_loc = __data_loc + SIZEOF(.data);
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#ifdef CONFIG_HAVE_TCM
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/*
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* We align everything to a page boundary so we can
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* free it after init has commenced and TCM contents have
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* been copied to its destination.
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*/
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.tcm_start : {
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. = ALIGN(PAGE_SIZE);
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__tcm_start = .;
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__itcm_start = .;
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}
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/*
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* Link these to the ITCM RAM
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* Put VMA to the TCM address and LMA to the common RAM
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* and we'll upload the contents from RAM to TCM and free
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* the used RAM after that.
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*/
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.text_itcm ITCM_OFFSET : AT(__itcm_start)
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{
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__sitcm_text = .;
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*(.tcm.text)
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*(.tcm.rodata)
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. = ALIGN(4);
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__eitcm_text = .;
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}
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/*
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* Reset the dot pointer, this is needed to create the
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* relative __dtcm_start below (to be used as extern in code).
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*/
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. = ADDR(.tcm_start) + SIZEOF(.tcm_start) + SIZEOF(.text_itcm);
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.dtcm_start : {
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__dtcm_start = .;
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}
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/* TODO: add remainder of ITCM as well, that can be used for data! */
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.data_dtcm DTCM_OFFSET : AT(__dtcm_start)
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{
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. = ALIGN(4);
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__sdtcm_data = .;
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*(.tcm.data)
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. = ALIGN(4);
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__edtcm_data = .;
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}
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/* Reset the dot pointer or the linker gets confused */
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. = ADDR(.dtcm_start) + SIZEOF(.data_dtcm);
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/* End marker for freeing TCM copy in linked object */
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.tcm_end : AT(ADDR(.dtcm_start) + SIZEOF(.data_dtcm)){
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. = ALIGN(PAGE_SIZE);
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__tcm_end = .;
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}
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#endif
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BSS_SECTION(0, 0, 0)
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_end = .;
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STABS_DEBUG
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}
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/*
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* These must never be empty
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* If you have to comment these two assert statements out, your
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* binutils is too old (for other reasons as well)
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*/
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ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
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ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
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/*
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* The HYP init code can't be more than a page long,
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* and should not cross a page boundary.
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* The above comment applies as well.
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*/
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ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & PAGE_MASK) <= PAGE_SIZE,
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"HYP init code too big or misaligned")
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