The initial version of the DSA driver only supported a single switch chip per network interface, while DSA-capable switch chips can be interconnected to form a tree of switch chips. This patch adds support for multiple switch chips on a network interface. An example topology for a 16-port device with an embedded CPU is as follows: +-----+ +--------+ +--------+ | |eth0 10| switch |9 10| switch | | CPU +----------+ +-------+ | | | | chip 0 | | chip 1 | +-----+ +---++---+ +---++---+ || || || || ||1000baseT ||1000baseT ||ports 1-8 ||ports 9-16 This requires a couple of interdependent changes in the DSA layer: - The dsa platform driver data needs to be extended: there is still only one netdevice per DSA driver instance (eth0 in the example above), but each of the switch chips in the tree needs its own mii_bus device pointer, MII management bus address, and port name array. (include/net/dsa.h) The existing in-tree dsa users need some small changes to deal with this. (arch/arm) - The DSA and Ethertype DSA tagging modules need to be extended to use the DSA device ID field on receive and demultiplex the packet accordingly, and fill in the DSA device ID field on transmit according to which switch chip the packet is heading to. (net/dsa/tag_{dsa,edsa}.c) - The concept of "CPU port", which is the switch chip port that the CPU is connected to (port 10 on switch chip 0 in the example), needs to be extended with the concept of "upstream port", which is the port on the switch chip that will bring us one hop closer to the CPU (port 10 for both switch chips in the example above). - The dsa platform data needs to specify which ports on which switch chips are links to other switch chips, so that we can enable DSA tagging mode on them. (For inter-switch links, we always use non-EtherType DSA tagging, since it has lower overhead. The CPU link uses dsa or edsa tagging depending on what the 'root' switch chip supports.) This is done by specifying "dsa" for the given port in the port array. - The dsa platform data needs to be extended with information on via which port to reach any given switch chip from any given switch chip. This info is specified via the per-switch chip data struct ->rtable[] array, which gives the nexthop ports for each of the other switches in the tree. For the example topology above, the dsa platform data would look something like this: static struct dsa_chip_data sw[2] = { { .mii_bus = &foo, .sw_addr = 1, .port_names[0] = "p1", .port_names[1] = "p2", .port_names[2] = "p3", .port_names[3] = "p4", .port_names[4] = "p5", .port_names[5] = "p6", .port_names[6] = "p7", .port_names[7] = "p8", .port_names[9] = "dsa", .port_names[10] = "cpu", .rtable = (s8 []){ -1, 9, }, }, { .mii_bus = &foo, .sw_addr = 2, .port_names[0] = "p9", .port_names[1] = "p10", .port_names[2] = "p11", .port_names[3] = "p12", .port_names[4] = "p13", .port_names[5] = "p14", .port_names[6] = "p15", .port_names[7] = "p16", .port_names[10] = "dsa", .rtable = (s8 []){ 10, -1, }, }, }, static struct dsa_platform_data pd = { .netdev = &foo, .nr_switches = 2, .sw = sw, }; Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Gary Thomas <gary@mlbassoc.com> Signed-off-by: David S. Miller <davem@davemloft.net>
205 lines
4.7 KiB
C
205 lines
4.7 KiB
C
/*
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* net/dsa/tag_dsa.c - (Non-ethertype) DSA tagging
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* Copyright (c) 2008-2009 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/etherdevice.h>
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#include <linux/list.h>
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#include <linux/netdevice.h>
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#include "dsa_priv.h"
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#define DSA_HLEN 4
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int dsa_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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struct dsa_slave_priv *p = netdev_priv(dev);
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u8 *dsa_header;
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += skb->len;
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/*
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* Convert the outermost 802.1q tag to a DSA tag for tagged
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* packets, or insert a DSA tag between the addresses and
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* the ethertype field for untagged packets.
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*/
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if (skb->protocol == htons(ETH_P_8021Q)) {
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if (skb_cow_head(skb, 0) < 0)
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goto out_free;
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/*
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* Construct tagged FROM_CPU DSA tag from 802.1q tag.
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*/
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dsa_header = skb->data + 2 * ETH_ALEN;
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dsa_header[0] = 0x60 | p->parent->index;
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dsa_header[1] = p->port << 3;
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/*
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* Move CFI field from byte 2 to byte 1.
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*/
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if (dsa_header[2] & 0x10) {
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dsa_header[1] |= 0x01;
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dsa_header[2] &= ~0x10;
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}
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} else {
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if (skb_cow_head(skb, DSA_HLEN) < 0)
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goto out_free;
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skb_push(skb, DSA_HLEN);
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memmove(skb->data, skb->data + DSA_HLEN, 2 * ETH_ALEN);
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/*
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* Construct untagged FROM_CPU DSA tag.
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*/
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dsa_header = skb->data + 2 * ETH_ALEN;
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dsa_header[0] = 0x40 | p->parent->index;
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dsa_header[1] = p->port << 3;
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dsa_header[2] = 0x00;
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dsa_header[3] = 0x00;
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}
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skb->protocol = htons(ETH_P_DSA);
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skb->dev = p->parent->dst->master_netdev;
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dev_queue_xmit(skb);
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return NETDEV_TX_OK;
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out_free:
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kfree_skb(skb);
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return NETDEV_TX_OK;
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}
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static int dsa_rcv(struct sk_buff *skb, struct net_device *dev,
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struct packet_type *pt, struct net_device *orig_dev)
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{
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struct dsa_switch_tree *dst = dev->dsa_ptr;
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struct dsa_switch *ds;
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u8 *dsa_header;
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int source_device;
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int source_port;
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if (unlikely(dst == NULL))
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goto out_drop;
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skb = skb_unshare(skb, GFP_ATOMIC);
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if (skb == NULL)
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goto out;
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if (unlikely(!pskb_may_pull(skb, DSA_HLEN)))
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goto out_drop;
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/*
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* The ethertype field is part of the DSA header.
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*/
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dsa_header = skb->data - 2;
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/*
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* Check that frame type is either TO_CPU or FORWARD.
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*/
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if ((dsa_header[0] & 0xc0) != 0x00 && (dsa_header[0] & 0xc0) != 0xc0)
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goto out_drop;
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/*
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* Determine source device and port.
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*/
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source_device = dsa_header[0] & 0x1f;
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source_port = (dsa_header[1] >> 3) & 0x1f;
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/*
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* Check that the source device exists and that the source
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* port is a registered DSA port.
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*/
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if (source_device >= dst->pd->nr_chips)
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goto out_drop;
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ds = dst->ds[source_device];
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if (source_port >= DSA_MAX_PORTS || ds->ports[source_port] == NULL)
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goto out_drop;
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/*
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* Convert the DSA header to an 802.1q header if the 'tagged'
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* bit in the DSA header is set. If the 'tagged' bit is clear,
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* delete the DSA header entirely.
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*/
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if (dsa_header[0] & 0x20) {
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u8 new_header[4];
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/*
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* Insert 802.1q ethertype and copy the VLAN-related
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* fields, but clear the bit that will hold CFI (since
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* DSA uses that bit location for another purpose).
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*/
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new_header[0] = (ETH_P_8021Q >> 8) & 0xff;
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new_header[1] = ETH_P_8021Q & 0xff;
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new_header[2] = dsa_header[2] & ~0x10;
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new_header[3] = dsa_header[3];
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/*
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* Move CFI bit from its place in the DSA header to
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* its 802.1q-designated place.
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*/
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if (dsa_header[1] & 0x01)
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new_header[2] |= 0x10;
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/*
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* Update packet checksum if skb is CHECKSUM_COMPLETE.
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*/
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if (skb->ip_summed == CHECKSUM_COMPLETE) {
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__wsum c = skb->csum;
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c = csum_add(c, csum_partial(new_header + 2, 2, 0));
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c = csum_sub(c, csum_partial(dsa_header + 2, 2, 0));
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skb->csum = c;
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}
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memcpy(dsa_header, new_header, DSA_HLEN);
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} else {
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/*
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* Remove DSA tag and update checksum.
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*/
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skb_pull_rcsum(skb, DSA_HLEN);
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memmove(skb->data - ETH_HLEN,
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skb->data - ETH_HLEN - DSA_HLEN,
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2 * ETH_ALEN);
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}
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skb->dev = ds->ports[source_port];
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skb_push(skb, ETH_HLEN);
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skb->pkt_type = PACKET_HOST;
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skb->protocol = eth_type_trans(skb, skb->dev);
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skb->dev->stats.rx_packets++;
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skb->dev->stats.rx_bytes += skb->len;
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netif_receive_skb(skb);
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return 0;
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out_drop:
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kfree_skb(skb);
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out:
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return 0;
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}
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static struct packet_type dsa_packet_type __read_mostly = {
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.type = cpu_to_be16(ETH_P_DSA),
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.func = dsa_rcv,
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};
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static int __init dsa_init_module(void)
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{
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dev_add_pack(&dsa_packet_type);
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return 0;
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}
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module_init(dsa_init_module);
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static void __exit dsa_cleanup_module(void)
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{
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dev_remove_pack(&dsa_packet_type);
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}
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module_exit(dsa_cleanup_module);
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