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ircd::simt: Add cycles_rtc() intrinsic for s_memrealtime on (AMDGCN).

This commit is contained in:
Jason Volk 2022-12-01 19:22:11 +00:00
parent a53963fc51
commit 1f87668a28

View file

@ -24,3 +24,29 @@ ircd_simt_cycles()
#endif
}
#endif
#if defined(__OPENCL_VERSION__)
/// Read the realtime-clock cycle counting timestamp `s_memrealtime` otherwise
/// falls back to the default cycle counter (which defaults to zero if also not
/// supported).
///
/// This is more consistent than `s_memtime` but slightly less granular; it is
/// probably provided by a control unit rather than directly in an SIMD/ALU.
inline ulong
__attribute__((always_inline))
ircd_simt_cycles_rtc()
{
ulong ret;
#if defined(__AMDGCN__)
asm volatile
(
"s_memrealtime %0"
: "=s" (ret)
);
#else
ret = ircd_simt_cycles();
#endif
return ret;
}
#endif